This is our latest selection of worldwide publications and patents in english on Semiconductors, between many scientific online journals, classified and focused on semiconductor, diode, MOFSET, PN junction, N-type, P-type, BJT and JFET.
Investigation of Source/Drain Height Variation and Its Impacts on FinFET and GAA Nanosheet FET
Published on 2025-03-10 by Mingyu Ma, Cong Li, Jianghao Ma, Wangjun Yang, Haokun Li, Hailong You, M. Jamal Deen @MDPI
Abstract: As semiconductor technology and process nodes advance, three-dimensional devices like FinFET and NSFET are increasingly becoming the primary choice, replacing planar MOSFETs. However, the complex manufacturing processes and high process sensitivity of three-dimensional devices at advanced process nodes inevitably cause significant deviations from the ideal structure during actual fabrication, leading to notable changes in their electrical characteristics. This paper investigates the impact of so[...]
Our summary: Investigation of Source/Drain Height Variation and Its Impacts on FinFET and GAA Nanosheet FET, Three-dimensional devices like FinFET and NSFET are increasingly replacing planar MOSFETs as semiconductor technology advances. Deviations in the ideal structure due to manufacturing processes at advanced nodes can lead to significant changes in electrical characteristics. Height fluctuations in source/drain regions impact device and circuit characteristics, with differences observed between FinFET and NSFET properties.
FinFET, GAA Nanosheet FET, Source/Drain Height Variation, Electrical Characteristics
Publication
An Active Radar Interferometer Utilizing a Heterodyne Principle-Based Target Modulator
Published on 2025-03-10 by Simon M�ller, Andreas R. Diewald, Georg Fischer @MDPI
Abstract: The Active Radar Interferometer (AcRaIn) represents a novel approach in secondary radar technology, aimed at environments with high reflective clutter, such as pipes and tunnels. This study introduces a compact design minimizing peripheral components and leveraging commercial semiconductor technologies operating in the 24 GHz ISM band. A heterodyne principle was adopted to enhance unambiguity and phase coherence without requiring synchronization or separate communication channels. Experimental v[...]
Our summary: Active Radar Interferometer utilizing heterodyne principle-based target modulator for high reflective clutter environments, compact design leveraging commercial semiconductor technologies, experimental validation demonstrating functionality over distances up to 150 m.
Radar Interferometer, Heterodyne Principle, Target Modulator, Semiconductor Technologies
Publication
On the Current Conduction and Interface Passivation of Graphene–Insulator–Silicon Solar Cells
Published on 2025-03-08 by Hei Wong, Jieqiong Zhang, Jun Liu, Muhammad Abid Anwar @MDPI
Abstract: Interface-passivated graphene/silicon Schottky junction solar cells have demonstrated promising features with improved stability and power conversion efficiency (PCE). However, there are some misunderstandings in the literature regarding some of the working mechanisms and the impacts of the silicon/insulator interface. Specifically, attributing performance improvement to oxygen vacancies and characterizing performance using Schottky barrier height and ideality factor might not be the most accura[...]
Our summary: Interface-passivated graphene/silicon Schottky junction solar cells show improved stability and power conversion efficiency, with a focus on Al2O3 interface ALD growth on silicon and its impact on MIS solar cells. Current conduction in MIS solar cells with a 2 to 3 nm insulating layer is better described by direct tunneling, Poole-Frenkel emission, and Fowler-Nordheim tunneling. Key factors for process optimization include dielectric film thickness, band offset with Si, and interface roughness.
interface passivation, graphene/silicon, Schottky junction, ALD growth
Publication
Novel APD Array Configurations for Improved Detection Area and Frequency Response
Published on 2025-03-08 by Xuan Zeng, Xuzhen Yu, Hewei Zhang, Yi Lu, Yanli Zhao @MDPI
Abstract: This paper presents two novel avalanche photodiode (APD) array structures designed to significantly enhance both detection area and bandwidth, overcoming the common trade-off between these parameters in conventional photodetectors. The impact of various parameters on the bandwidths of the two distinct array structures was theoretically simulated. Experimental validation using the self-fabricated 2 × 2 array on PCB board confirmed the bandwidth enhancement realized through inductor [...]
Our summary: This paper introduces two innovative APD array structures that improve detection area and bandwidth, overcoming the common trade-off. Theoretical simulations and experimental validation on a self-fabricated 2x2 array demonstrate significant bandwidth enhancements achieved through inductor integration. Structure 2 is recommended for its lower noise, better SNR, and reduced power consumption.
APD Array Configurations, Detection Area, Frequency Response, Bandwidth
Publication
High-Voltage Electrostatic Discharge/Electrical Overstress Co-Protection Implementing Gradual-Triggered SCR and MOS-Stacked Configuration
Published on 2025-03-08 by Hailian Liang, Jianfeng Li, Jun Sun, Dejin Wang, Fang Wang, Dong Wang, Junliang Liu @MDPI
Abstract: This paper proposes a monolithic electrostatic discharge/electrical overstress (ESD/EOS) co-protection device featuring gradual triggering by silicon-controlled rectifier (SCR) and metal–oxide semiconductor (MOS) structures, demonstrating enhanced voltage clamping and current-conducting capabilities. Compared with conventional PMOS-triggered SCR (PMOS-SCR) for ESD protection, the proposed dual-PMOS-triggered SCR (DPMOS-SCR) architecture within a compact area achieves monolithic ESD[...]
Our summary: This paper introduces a monolithic ESD/EOS co-protection device with gradual-triggered SCR and MOS-stacked configuration, demonstrating enhanced voltage clamping and current-conducting capabilities. The proposed DPMOS-SCR architecture achieves high efficiency in a small chip area, improving the reliability of high-voltage ICs.
High-Voltage, Electrostatic Discharge, Silicon-Controlled Rectifier, Metal-Oxide Semiconductor
Publication
Oxygen Scavenger Effect Induced by a Metal-Capping Layer
Published on 2025-03-08 by Seung-Min Lee, Seong Cheol Jang, Ji-Min Park, Jaewon Park, Nayoung Choi, Kwun-Bum Chung, Jung Woo Lee, Hyun-Suk Kim @MDPI
Abstract: With the ongoing development of electronic devices, there is an increasing demand for new semiconductors beyond traditional silicon. A key element in electronic circuits, complementary metal-oxide semiconductor (CMOS), utilizes both n-type and p-type semiconductors. While the advancements in n-type semiconductors have been substantial, the development of high-mobility p-type semiconductors has lagged behind. Recently, tellurium (Te) has been recognized as a promising candidate due to its superio[...]
Our summary: Development of high-mobility p-type semiconductors is crucial for advancing electronic devices. An innovative approach involving a metal-capping layer on tellurium thin-film transistors enhances their electrical characteristics by inducing an oxygen scavenger effect, leading to high-quality thin films and improved field-effect mobility. This progress holds promise for various industries and applications.
metal-capping layer, oxygen scavenger effect, high-mobility p-type semiconductors, tellurium
Publication
Biosensor including corrugated semiconductor or semi-metal material and manufacturing method thereof
Patent published on the 2025-03-06 in WO under Ref WO2025048258 by G MEDICS KOREA CO LTD [KR] (Hwang Tae Young [kr], Park In Su [kr], Kim Chun Seok [kr], Song Seung Yong [kr], Ryu Jae Chul [kr])
Abstract: A biosensor according to the present invention comprises: a substrate extending in a first horizontal direction and a second horizontal direction intersecting the first horizontal direction; a source electrode and a drain electrode spaced apart from each other on the substrate: a corrugated semiconductor (or semi-metal) channel which is disposed between the source electrode and the drain electrode and has peak portions and valley portions having a height difference in the vertical direction on t[...]
Our summary: Substrate with source and drain electrodes, corrugated semiconductor channel with peak and valley portions, probe chemically bonding to target material, gate electrode for control.
biosensor, corrugated semiconductor, manufacturing method, probe
Patent
One chamber multi-station selective metal removal
Patent published on the 2025-03-06 in WO under Ref WO2025048924 by APPLIED MAT INC [US] (Yue Shiyu [us], Patel Sahil Jaykumar [us], Lei Yu [us], Lei Wei [us], Hsu Chih-hsun [us], Xu Yi [us], Hairisha Abulaiti [us], Trinh Cong [us], Yang Yixiong [us], Oh Ju Hyun [us], Zhang Aixi [us], Gao Xingyao [us], Wang Rongjun [u)
Abstract: A method of selective metal removal via gradient oxidation for a gap-fill includes performing process cycles, each process cycle including placing a wafer having a semiconductor structure thereon into a first processing station, the semiconductor structure including a dielectric layer patterned with a feature formed therein and a seed layer formed on sidewalls and a bottom surface of the feature and a top surface of the dielectric layer, performing a reduction process on the wafer in the first p[...]
Our summary: One chamber multi-station selective metal removal method via gradient oxidation for a gap-fill involves process cycles placing a wafer with a semiconductor structure into processing stations, performing reduction, oxidation, and etch processes in each station, all within a processing chamber.
selective metal removal, gradient oxidation, gap-fill, semiconductor structure
Patent
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