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CMOS (Complementary Metal-Oxide-Semiconductor) is the dominant technology for constructing integrated circuits. It uses complementary pairs of p-type and n-type MOSFETs to build logic gates. Its primary advantage is very low static power consumption, as one transistor in the pair is always off during steady state, resulting in minimal current flow except during switching transitions.
A CMOS logic gate, such as an inverter, is constructed with both a PMOS (p-type) and an NMOS (n-type) transistor. The PMOS transistor is connected to the positive voltage supply (Vdd), and the NMOS transistor is connected to ground (GND). Their gates are tied together as the input, and their drains are tied together as the output. When the input is low (logic 0), the PMOS transistor turns on, and the NMOS turns off, pulling the output high to Vdd (logic 1). Conversely, when the input is high (logic 1), the PMOS turns off, and the NMOS turns on, pulling the output low to GND (logic 0).
In either stable state (output high or low), one of the transistors is off, creating a very high resistance path between the power supply and ground. This means that virtually no current flows, leading to extremely low static power dissipation. Power is primarily consumed only when the transistors are switching states. This characteristic made CMOS technology ideal for battery-powered devices and for creating highly dense integrated circuits where managing heat dissipation is a critical challenge. The scalability of CMOS, allowing for smaller and faster transistors with each generation, has been the engine behind Moore’s Law and the digital revolution.
互补金属氧化物半导体 (CMOS)
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